1. Field of the Invention
This invention relates to a packaging process of semiconductor, and more particularly to a wafer level packaging process of semiconductor.
2. Description of Related Art
After completing the manufacturing of semiconductor devices on the wafer, the conventional packaging process is to perform a die sawing step in order to cut the wafer into many dies, then to perform packaging process respectively so as to form various types of IC packages. However, since the semiconductor devices formed on the wafer are very tiny in size, they are subject to damage resulted from die handling, small particles in the air, moisture and airflow etc.
The foregoing problems are resulted from the process that performs packaging process after the dies are cut from the wafer. A conventional way to resolve the problems is to perform the wafer level process first before performing the die sawing process. Additionally, the package size of the wafer level packaging is closed to that of the die, thereby the size of the package can be greatly reduced which meet the current requirements of "Light, Thin, Short, and Small" in packaging design.
However, the conventional wafer level packaging processes consisting of processes such as flux coating on the carrier of the wafer, and solder-ball planting etc. are apt to damage the surface of the wafer or contaminate the devices. Moreover, since the flux coated on the carrier is hard to get rid of, thereby, the flux is apt to remain on the wafer. The residual flux on the wafer will affect the electrical performance of the semiconductor products, and consequently will reduce the yield and increase the manufacturing cost.